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VIDIOT MODULE AS-2S18-121
THEORY OF OPERATION
I. VIOIOT SELF-TEST
The Vidiot module has. as part of integrated circuits U12 and U29, programs designed to test the two parts of the
module each time power is applied. No action is required on the operator's part to initiate the test. The programs
cause each MPU chip to test itself, the program ROMs, the scratch pad RAMS, the I/O chips, the Video Display
Processor (VDP) and the video RAM (VRAM). If the uP finds all circuits in proper operating order it initializes the
Vidiot module and makes it ready for game play. If the uP finds a fault during the course of Self-Test, it stops
at that point in the test and does not allow game play.
The accuracy of the Vidiot Self-Test is about 90%. All faults except D/A converter, low-pass filter, power amplifier and
communications interface problems are detected.
The interesting idea behind the Vidiot Self-Test is that not only does it prevent operation when faults are detected,
but like the MPU module it helps to localize these faults. The LED indicator on the Vidiot flashes once for each success-
fully completed test. Counting the number of flashes of the LED, after power-up, localizes the fault to the offending
circuit of the module.
Both the Sound uP and Video uP on the Vidiot use the same LED for Self-Test. The Sound uP goes first while
the Video uP waits for about 30 seconds. If the LED comes on after RESET and stays on both the Sound and Video
sections of the Vidiot are not functioning. If the LED stays on or off for about 3 seconds then starts flashing the
Sound section has a problem. If the LED flashes then stays on or off after about 3 seconds the Video section of
the Vidiot has a problem.
A) 1st Flash
After RESET the Sound uP (U27) attempts to test the sound ROM (U29). It does a vertical sum of the ROM contents
and checks this for an all ones result. If the computed checksum is not all ones, U29 is defective and the uP will
not allow sounds to be made. If the checksum is 11111111 the uP flashes the LED and proceeds to the next test.
B) 2nd Flash
Next the Sou nd uP (U27) tests itself and its on-ch ip RAM. It attempts to write then read back all 256 pattems (00000000
to 11111111) in each of the 128 on-chip RAM locations. If at any point in this test the uP fails to correctly read
back a pattern that it has written, U27 is deemed defective and the uP will not allow sounds to be made. If the
uP completes the test successfully it flashes the LED and awaits sound instructions from the Video section.
C) 3rd Flash
After a pause the video uP (U8) attempts to test the program ROM U12. It performs a vertical sum of the ROM
contents and checks this for an all ones result. If the computer checksum is not all ones, U12 is defective and
the uP will not allow game play. If the checksum is 11111111 the uP flashes the LED and proceeds to the next test.
0) 4th Flash
Next the video uP attempts to test ROM U11 in the same way. If the checksum is incorrect U11 is defective and
the uP will not allow game play. If the checksum is correct the uP flashes the LED and proceeds to the next test.
E) 5th Flash
This test is the same as the 4th flash but is performed on U10. A good ROM in U10 is indicated with a LED flash and
the next test is started. A bad part in U10 will not allow game play.
F) 6th Flash
This test is the same as the 5th flash but is performed on U9. A good ROM in U9 is indicated with a LED flash and the
next test is started. A bad part in U9 will not allow game play.
G) 7th Flash
Now the Video uP (U8) tests the scratch RAMs U13 and U14. It attempts to write then read back an incrementing
pattern that is not address aligned to all 1024 locations. It then attempts to write and read back a decrementing
non-aligned pattern. If at any point in this test the uP fails to correctly verify the pattern it has written U13 and
U14 are deemed bad and the uP will not allow the Vidiot to come up. If the uP completes the test successfully
it flashes the LED and proceeds to the next test.
H) 8th Flash
The Video uP now tests the PIA chip U7. It tests each of the two full byte port initialization registers with a 256 pattern
test (00000000 to 11111111). It tests each of the two full byte I/O registers, PAO-PA7 and PBO-PB7 with a 256
pattern test. It then tests the CA2 and CB2 ports. These are initialized as outputs then written into to see if they will
store a '1' and a '0'. When both ports are found good, the uP flashes the LED and proceeds to the next test.
I) 9th Flash
The next test attempts to verify that the VDP is operating. The uP attempts to initialize the VDP registers for operation
then monitors the 'End of Frame' flag bit in one of the registers. After the first occurrence the uP resets the bit
and times its re-occurrence. The VDP should set this bit at the end of each video scan frame, about 60 Hertz, If this
rate is not detected the uP finds the VDP defective and won't allow the video to come up. If the rate is within
tolerance the uP flashes the LED and proceeds to the next test.
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